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Altera_Forum
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14 years ago

To build a FIFO using SRAM

Hi, I would like to build a DCFIFO using a SRAM chip on DE2-115. Any idea on where i should start? I know SRAM reads and writes on a different clock cycle as the dataIn and dataOut share t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

My ADC is sampling at 65MHz. i am trying to capture 2MB(1024000 samples) of ADC data and send to through QuickUSB at 30MB/s, and graph it on my laptop continuously .

Do you think NIOS 2 is capable of handling 65MHz data? or the SRAM controller is running at slower speed than 65MHz?

regards,

Michael