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Altera_Forum
Honored Contributor
16 years agoTiming Question
Hi everybody, I'm new to these forums.. the community seems helpful. Hopefully someone will have input on my question, and hopefully I can help others. So I'm working on an MAXPLUS7128 SLC84-1...
Altera_Forum
Honored Contributor
16 years agoHello,
It turns out I was measuring the wrong pin.. Haha the clk_out is fine. My input clock is fine, I have created a very stable clock on it previous to this experiment. I will make sure to change my ports to STD_VECTOR. I had removed the when 21 case to wrap back to 0 thinking it might help so I'll put it back in. Could you please expand on your third suggestion about signals? I think this means using temporary variables inside PROCESS, and then assigning the variable to a port at the end of PROCESS. Other than that I think I need to keep on re-reading the data sheet and simulating, instead of burning. Thanks