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Unfortunately I don't know the FIR's internals, I design my own filters without using the megacore. Can the coefficients loading be done in a different clock domain?
Did you have a loot at the timing advisor (Tool menu)? It con give you some ideas about settings to change to increase the fmax.
Do you have some options to register the core's inputs and outputs? If yes, enable them.
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It is has two ways to design the fir core with coefficient reloading process, one is synchronous clock domain, and the other is in different clock domain. Since the asynchronous architecture is a little bit difficult when I consider about the data transfer between this core and my other circuit, in addition, one clock domain is more stable in the system, so I give up that idea and design all of them in one clock domain. So for the fir core, the coefficient reloading is done in one clock domain. The structure could be remodified, but I still wish to do it based on my current structure. If it still can’t meet timing requirement, I would consider to change it later.
And for those options in tool menu, I’ve already set them, for instance, optimize speed in Analysis, check auto fit in fitter effort, etc. Could you give more advice based your own design experience?
Btw, when you design fir by yourself, how to write timing constraint to meet requirement in your project?
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