Forum Discussion
ATsao3
New Contributor
6 years agotiming constraint for output mux and how to set output delay.
Hi, I’m looking for some help to constraint my design. I didn’t write constraint before and i look some documents on internet. Still can’t find any example similar to my design. My design has two i...
ak6dn
Regular Contributor
6 years agoAlso refer to this app note for source sync interfaces:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an433.pdf