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Hi,
I agree that wrapping your head around TimeQuest for the first time is hard. Other than the TimeQuest User Guide, the TimeQuest Cook Book (
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/mnl_timequest_cookbook.pdf) might help. Also, what helped me a lot when I had to constrain a synchronous interface for the first time is this wonderful article:
http://retroramblings.net/?p=515.
When you run the timing analysis in Quartus, the report is either red or black. Black means timing is OK, red means timing is violated. It's as simple as that.
Some hints:
- try to create simple mock-up designs, e.g. with only one synchronous input, and try to constrain that; then go on with other mock-ups, e.g. a synchronous output, two clock domains with a crossing signal, etc.; once you master this, you should be able to constrain your design
- before you dive into details about a failed timing analysis, make sure that no unconstrained paths are reported! If unconnstrained paths are reported, you can open the project in TimeQuest, and let you generate a report of unconstrained paths
- if something fails, the report (the standard one shown in Quartus) shows you which paths are violated; pay close attention to the launch and latch clocks! It's a common mistake to specify the clocks wrong, or to forget to define clock domain crossings as false paths
- don't be surprised if the maximum clock speed that TimeQuest reports has almost no margin to your targeted clock, because the Quartus fitter (a least with default settings) does not try to optimize beyond the specified clock frequency
- also, don't be surprised if the maximum clock is higher than your target even though the report shows a fail; in that case, you should just ignore the reported maximum frequency
Best regards,
GooGooCluster
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Thx a lot man , I could manage it.
Honored Contributor
