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Altera_Forum
Honored Contributor
16 years agotime in generic clause of entity for synthesis
Dear All, is it possible to use generic of type 'time' in an entity declaration which is used for synthesis? I'd like to use time specification as top-entity generic parameter, which is in the sub...
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- sorry. i've been talking about syntesis, but in fact I tried create a symbol block. This is where it crashes. (q9.0) d. --- Quote End --- Well that will be your problem. The symbol creator is very basic and wont accept anything too exciting. It can only really cope with integers, signed/unsigned, std_logic(_vector) and boolean. best to just stick in VHDL for your top level instantiations.