lambert_yu
Contributor
ContributorThere's minimum pulse violation for IOPLL under source synchronous operation mode
Hi, I am facing one issue when I design the source synchronous lvds project. case: quartus II : 18.0.0 standard speed : 1.6Gbps; PLL : use external PLL ref clk for PLL: 800Mhz op...
May I know which LVDS functional mode are you using?
You will need to use the PLL compensation mode provided in the User Guide, for the corresponding LVDS functional mode.
Regards,
Richard Tan
