the TG_DATA_MODE of traffic generator 2.0 for EMIF example is not correctly

Hi ,

fpga: arria 10.

Now i am studying DDR4 controller, I have got one example to simulation, but I found that for the generator of traffic generator, the TG_DATA_MODE is not setted corretly. It presents that:

for(i = 0; i < num_data_generators; i = i + 1)begin

tg_send_cfg_write_0(TG_DATA_SEED + i, 32'h5A);

tg_send_cfg_write_0(TG_DATA_MODE + i, 32'h1) ;in altera_emif_avl_tg_2_tb.sv.

end

I think it's not necessary to add i in the tg_send_cfg_write_0 function, and if adding i, there is error message during simulation. Or, there is something that I have not firgured out, please help me.

Best regards,

Lambert