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Altera_Forum
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16 years ago

The TCS signal of JTAG device

Hi all, I use cyclone II FPGA device and there are four pins for JTAG: TDI,TCK,TCS (Test Chip Select)and TDO.

BUt I found that usually in a JTAG device there are five ports: TDI,TCK,TMS(Test Mode Select),TDO and TRST. Is the one called TMS here same as TCS?Who can tell me what's the usage of TCS,how it works?I don't understand.Who decide when TCS signal should be one or zero?

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  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    You can see that does TCS pins in JTAG and TMS pins in JTAG at the same place or not!

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    I use cyclone II FPGA device and there are four pins for JTAG: TDI,TCK,TCS (Test Chip Select)and TDO.

    --- Quote End ---

    A designator tcs isn't used in any Altera Cyclone II, document, as far as I know. Which document you're referring to?
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    In the pin planner I can found TMS, while in demonstration verilog files I found TCS

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    Hi all, I use cyclone II FPGA device and there are four pins for JTAG: TDI,TCK,TCS (Test Chip Select)and TDO.

    --- Quote End ---

    Hello.

    The evaluation board uses a modified variant of the USB blaster that allows to do some SPI-Like communication to the application in the FPGA. The signal lines are named TDI, TDO, TCK and TCS. From the FPGA's point of view these signals are just simple logic signals without any special meaning.

    Note that the protocol that is used here is more similar to SPI than to JTAG!

    The chip itself uses 4 lines: TDI, TDO, TCK and TMS (not TCS). The TRST line is optional for JTAG devices. It is not used by the Cyclone II.

    Martin