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Hi all, I use cyclone II FPGA device and there are four pins for JTAG: TDI,TCK,TCS (Test Chip Select)and TDO.
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Hello.
The evaluation board uses a modified variant of the USB blaster that allows to do some SPI-Like communication to the application in the FPGA. The signal lines are named TDI, TDO, TCK and TCS. From the FPGA's point of view these signals are just simple logic signals without any special meaning.
Note that the protocol that is used here is more similar to SPI than to JTAG!
The chip itself uses 4 lines: TDI, TDO, TCK and TMS (not TCS). The TRST line is optional for JTAG devices. It is not used by the Cyclone II.
Martin
Honored Contributor
