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Altera_Forum
Honored Contributor
Honored ContributorThe problem of Altera-SoCFPGA-HardwareLib-Unhosted-CV-GNU！
I want to debug Altera-SoCFPGA-HardwareLib-Unhosted-CV-GNU on terasic de1-soc and I don‘t know how to modify preloader to set up the UART appropriately(baud rate, parity, stop bits). Could someone...
Altera_ForumHonored Contributor
Honored ContributorIf Preloader starts, it at once outs to UART its messages.
You see this through UART-USB cable ? At first out of Preloader, further -- Linux... Or in BootROM is initialising of UART on default values, or on start of Preloader... These settings is present in any Preloader or hard design ! Terasic give its sources of Preloader, not compatible with Altera-s ? In your HPS all devices is the same with Altera SoC, very strange is if HPS examples will not work everywhere.
