TCP Ethernet packet in FPGA?

ghertz,

TCP/IP is a very complex protocol and no, you will not get ordered packets into the FPGA. That is what the TCP/IP stack does. It also handles dropped and corrupt packets. The EMAC (TSE core for Altera) simply handles physically sending and receiving packets from the Phy which puts them on/off the cable. The TCP/IP stack is normally software in a processor that communicates via the EMAC. There is a company that makes a VHDL TCP/IP stack ( http://www.comblock.com COM-5402SOFT). I played with it and it worked pretty well.

Just getting a TCP/IP packet to the FPGA takes some work. You will set a MAC and TCP/IP address for the Altera TSE EMAC. But when try and send a packet to the FPGA via a socket, the PC will first send out an ARP packet asking which device is at that TCP/IP. You will have to send an ARP response with your MAC address. When experimenting to just see a TCP/IP packet show up in the FPGA, I use a workaround of manually setting an ARP entry in the Windows ARP table. In a DOS command prompt, type "arp /?" and check out the -s option.

Of course, if your FPGA is on a busy network, you will see a bunch of broadcast packets coming out of the EMAC without having to send anything to it. I normally take my PC and FPGA off our network when doing this sort of thing.

I think it's great you're trying to learn this sort of thing. Dying breed.

As you can see, it gets complicated pretty quickly. I learned TCP/IP many years ago via the classic set of books "TCP/IP Illustrated" by W Richard Stevens. There are others, and you can find online sources to get started. You will also need to understand the Ethernet Frame (see appendix in the TSE user guide). The Ethernet frame encapsulates the IP frame that encapsulates the TCP frame.