system design using cyclone II

Thanks Dave, I read the .m file and ran it step by step... realize again how many things I don't know yet...=(. especially the analysis of noise.

here are something I dont understand or am not sure about:

1. why is NCO signal and filter datapath 2-bit longer than ADC input? was it randomly assigned?

2. The incoherent mean is the power of the window, right? it is a normalization factor in computing spectrum.

3. why should I use multirate processing? i mean, the decimation. I had this question when I saw your diagram of the lock-in amplifier. is it necessary to downsample? so I should build a CIC filter instead of a FIR?

4. why need h(max) as an extra normalization factor?

5. Ns=Na*Nt+Nh, why? why do we need the extra samples from the window?

6. in the quantization of NCO signals, instead of 2^(B_noc-1), you used 2^(B_nco)-1, is it supposed to prevent overflowing? but it is only for NCO signals...

7.The way you quantized z_q(z_q = filter(h_q,1,y_q), then times 2^(B_out-1), round the number, divided by 2^(B_out-1)). in the hardware case, we just cut off LSB and MSB to keep the signed bit and B_out-1 bits, right?

8. The quantization noise floor I have always been confused, never understood it in the slides... can you explain to me more clearly?

9. in the figure(1)

plot(fn,10*log10(Rxx+10^(-10))); why adding 10^(-10)?

what we are interested is the amplitude of z_q right?

I guess tat's all my questions for now.... I really really appreciate your kindly and patient help. That makes my learning of FPGA and my project much easier....:-P

Allison