Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- This is still not clear. You do not indicate why the light would change at 154kHz. Is the light being 'chopped'. Could you please post a diagram of your setup? --- Quote End --- The light doesn't change. The light on the PSD(position sensor detector) will produce two currents I1 and I2 which decide the position of the light (X=(I1+I2)/(I1-I2), this will be performed within FPGA, right now all we want are the currents). After modulation and demodulation we get the interest current signal of 154Khz, combined with noises from other bands. --- Quote Start --- Right. In an FPGA, there would be a PLL, but at a much higher frequency that 154kHz. Inside the FPGA, the PLL would be used to clock a Numerically Controller Oscillator, and the output of that oscillator is a digital sinusoid and cosinusoid. One of those signals can be sent to a digital-to-analog converter (DAC) and filtered to give you a very clean 154kHz reference signal. That signal can be used to drive the sensors in your system. The sensor output would then be sampled by an analog-to-digital coverter (ADC). The samples would then internally be multiplied by the digital versions of the NCO outputs, i.e., your samples x(t) would be demodulated by the compex-exponential exp(-j*2*pi*fo*t) = cos(2*pi*fo*t) - j*sin(2*pi*f0*t), where f0 = 154kHz, and t = n/fs, where n is the sample index and fs is the sampling frequency. The complex-valued baseband signal would then pass through two digital filters. --- Quote End --- I am quite confused...from my understanding, a ALT_PLL can generate a sub-frequency clock, i.e. divide the original signal frequency by 1, 2...etc. The output of PLL is a clock that is phase locked to the input signal. I would then transfer this clock into a sine wave and then multiply it with the original 154Khz signal and pass the result through a LPF. And all of the above steps will be done within FPGA. what you describe above seems more complex... or maybe I am not following... --- Quote Start --- You're on the wrong group if you want help with Xilinx FPGAs. However, the above description would work fine with those parts too. --- Quote End --- sorry if I offend anybody here... I was thinking abt using Virtex long time ago but now I am back to Cyclone II. Thanks dave. Allison