streaming output register

I wrote a simple peripheral which provides a configurable number of output registers with built-in flow control. The flow control is based on Avalon streaming, so any streaming-capable master (such as the Avalon DMA controller) will work with it.

An example of the use of this component would be to transfer sample data from a memory buffer to an off-chip DAC at a specific rate.

The component has a simple GUI which allows configuration of three parameters:

- output data width (1 to 32 bits)

- output frequency

- output reset value

The attached zip file contains an example design which uses the component, and the component itself (in subdirectory streaming_output_register). The example has a Nios II and a simple test program written in the Eclipse IDE.

This component can also serve as a simple example of HDL-generation in Europa.

To see the component in action in the attached example design,

1) download and unzip the attached zip file.

2) Open the quartus project.

3) Open SOPC Builder and generate the system.

4) Open the Nios II IDE and import the two folders in the software subdirectory.

5) Build the application project "hello_alt_main_2".

6) Create a Run Modelsim configuration and run it.

7) in the Modelsim console, type "s; w; run 1.2ms".

8) Inspect the streaming_output_register signals in the modelsim wave window.

I welcome bug reports, feature requests and comments.