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Altera_Forum
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17 years ago

StratixIII EPCS problem VCCSEL?

Hello, I got problem that my EPCS cannot reconfig STRATIXIII. My VCCIO of I/O bank 3 is powered by 1.5V and the configuration signals used require 2.5-V signaling. Should I connec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

According to the Stratix III handbook, VCCPGM should be connected to 3.3V. I don't know, if the AS device is possibly working with 2.5V as well.

My suggestion for a voltage divider is one 1k resistor from EPCS.DATA to FPGA.DATA0 and one from FPGA.DATA0 to GND. But I didn't try it, in case of difficulties you should check for valid H and L voltage levels when accessing the EPCS device trough JTAG indirect programming.

Are you using the default Stratix III SFL design or SFL embedded to your design?