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Altera_Forum
Honored Contributor
17 years agoStratixIII EPCS problem VCCSEL?
Hello, I got problem that my EPCS cannot reconfig STRATIXIII. My VCCIO of I/O bank 3 is powered by 1.5V and the configuration signals used require 2.5-V signaling. Should I connec...
Altera_Forum
Honored Contributor
17 years agoI use indirect JTAG programming. Attached is the schematic how I connected the JTAG
1) Since the VCCIO for bank contained data0 (Bank1C) is connected to 1.5V; therefor, I follow your instruction to add resistor divider. How do I connect these resistors? 2) From schematic, do I connect JTAG pin 4 correctly? Should I change these 2.5V to 3.3V? 3) Should I change 2.5V_VCCPGM to 3.3V? Thanks