Altera_Forum
Honored Contributor
12 years agoStratix IV TR4 and fast ADC (3.6 GSPS)
Hello to everyone,
I am new to this forum and to the world of FPGA boards. I have been looking around for a long time, in order to choose the right develpment board for my appliccation, and now I am stuck into a problem/doubt which I would like to solve in the next time. Basically I would like to sample a signal with a maximum frequency of 1 GHz and process it by using a FPGA Board, and I would like to do it with devices already available on the market. After a long research I came to a reference board produced by Texas Instruments mounting the ADC12D1800RF which is able to sample at a maximum rate of 3.6 GSPS by using interleaving. The evaluation board comes with a FMC connector where I can stream the data down. This board has also a Virtex IV FPGA on board, taking care of the data transfer from the ADC, and possibly programmable in order to execute other tasks. For a question of necessity, I have chosen to use a TR4 Dev board, mounting a Stratix IV FPGA chip, which is very attractive for the performances and for the number of HSMC connectors available on it (4 of them are supporting LVDS, which I need for my ADC and DACs). The question now is, as I am still not an expert with FPGAs and their interfacing with such hardware devices, would I be able to read out without any loss the data stream coming from my ADC (4 channels)? With 3.6 GSPS, and by using a LVDS connection (through HSMC), will I saturate the transceivers of my FPGA? Do I need to de-serialize the data? Or may I choose for another development board mounting high speed transceivers in order to do this? I cannot still post any link but these are the devices which I would like to interconnet: ADC12D1800RFRB from Texas Instruments TR4 Dev. Board from Terasic I would be very gratefull for every advice or direction getting me back to the right path. All the Best. Giovanni