Honored Contributor
Honored ContributorA little more information for those interested.
I did a high level test and monitored each of the JTAG pins. When attempting to access the device, TCK, TDI, and TMS all show movement. I'm assuming it's an attempt to retrieve the device ID. However, when I monitor TDO, there is no signal coming back. It is just stuck low. This is obviously bad. I did a little more digging into how exactly the active serial configuration is supposed to work. It looks like one of the first steps is for the power to all come up within 100 msec (I have PORSEL set to GND). This happens correctly. Next, nCONFIG goes from low to high. At this point, nSTATUS is currently at GND. However, after nCONFIG goes high, nSTATUS is supposed to be released by the FPGA and pulled high by an external resistor. My problem is nSTATUS is NEVER released! Since nSTATUS is never released, configuration cannot begin. Does anyone know what causes nSTATUS to be held low by the FPGA? Thanks for taking the time to read/think about this.
