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Due to the die shrink, Stratix III I/O voltage must be <= 3.0V for JTAG Configuration to work stable.
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The most recent V1.4 Stratix III handbook clarifies:
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JTAG output pin TDO and all JTAG input pins are powered by the 2.5 V/3.0 V/3.3 V VCCPD.
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Please notice, that the IO- and configuration voltage specification has considerably changed between Handbook versions. It seems to me, that the previous 3.0 V restriction was motivated by doubts regarding possible damage by overvoltage, but application (e. g. related to AS configuration that effectively needs 3.3 V) and also customer requirements finally got the upper hand. I have, however, no own experience with Stratix III, but I would be suprized if 3.3V JTAG isn't operational.
Honored Contributor
