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Altera_Forum
Honored Contributor
17 years agoStratix II GX transceivers and REFCLK input clock
Hi, In a design involving a Stratix II GX 30 we are looking at the possibility to input one reference clock to the transceivers. Therefore, the reference clock input pin of one quad will need t...
Altera_Forum
Honored Contributor
17 years agoQuartus will automatically determine that the refclk needs to be picked up from the inter-quad route. It will also automatically configure the mux to the PLL to use the appropriate refclk input. I concur with Rysc on doing test compiles beforehand.
Jake