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Altera_Forum
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16 years ago

Stratix II GX Transceiver (basic) test design

Hi, I have a problem to get the Stratix II gx-Transceivers to run. My test-design uses a data-generator which produces a 32bit binary counter in a frequency of 100 MHz (from a PLL). I connected th...
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Altera_Forum
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8 years ago

I actually didn't even think about simulating my design, since I don't even know how I would connect my tx_out to my rx_in within the simulation (there isn't a "insert optical fibre here" option is there? :D, I tried simply connecting the ports via Signal, but it wouldn't synthesize).

I just tried to simulate it anyway just to see what the transmitter would do.... but NOTHING moves.

That is despite the fact, that in reality I actually am able to transmit SOMETHING (although it just seems to be random numbers).

Basically what I did is what was discussed above, so: Building a counter and connecting it to the alt2gxb mega function. In addition to that I wrote a state machine that would fire the reset sequence described in the Stratix II GX transceiver architecture overview on page 217.

But what comes out sadly doesn't remotely look similar to a simple counter.

Maybe I am just out of my depths here, but that's why I asked for examplefiles.

Maybe I should open up a new thread about this, just because of recency.