Stratix GX -> PCI-Express

Do you mean that it will not negotiate to L0 in the link training state machine – and not get enumerated by the PC? If so – suggest to run signal tap on the LTSSM to see what the link training state machine is doing. Seen a similar issue troubleshooting now with SII GX. Trying to adjust the RC time constant because NVidia (my chipset) uses a passive receiver detect scheme and I am going to adjust the termination resistance values in Quartus and also try to use an adapter where I cut and jump a series Cap in the receive side to put 2 caps in series in order to reduce the capacitance and change the time constant to see if the chip set detects my receiver.