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Altera_Forum's avatar
Altera_Forum
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18 years ago

Stratix GX -> PCI-Express

I am currently dealing with a project that uses the Stratix GX chip for the PCI-Express Interface. Unfortunately, the Altera pcie core I am using does not what to configure. I can see the PC trying to configuration the core on the RX side but there is no response from the Stratix GX.

- Has anyone every successfully implemented the Altera PCI-Express core in the Stratix GX?

- Does anyone know why pcie core is not responding to PC's configuration?

Thanks in advance.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Do you mean that it will not negotiate to L0 in the link training state machine – and not get enumerated by the PC? If so – suggest to run signal tap on the LTSSM to see what the link training state machine is doing. Seen a similar issue troubleshooting now with SII GX. Trying to adjust the RC time constant because NVidia (my chipset) uses a passive receiver detect scheme and I am going to adjust the termination resistance values in Quartus and also try to use an adapter where I cut and jump a series Cap in the receive side to put 2 caps in series in order to reduce the capacitance and change the time constant to see if the chip set detects my receiver.

    What chipset are you using?
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    The PC starts the neogatiation to L0. However the Stratix GX does not start any link training. From what I can tell the LTSSM on the FPGA does not leave the DETECT state.

    Chipset:

    North bridge - VIA K8M890

    South bridge - VIA VT8237A
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi R,

    I'm having a similar problem with a Stratix V part. Did you ever resolve your problem? If so how. Thank you,

    -Jeff