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Altera_Forum's avatar
Altera_Forum
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16 years ago

STRATIX family comparison (novice).

Hello,

(Sorry for my weak english :o)

I'm new to the FPGA devices and as a part of my internship, I have to do a "comparison study" about Stratix FPGAs (II, III, IV) regarding features, size, performances... So I started by reading respective Device Handbook and the Product Catalogue in which I found a lot of informations but I didn't manage to find some informations such as:
  • 3.3V LVTTL I/O Max Frequency

  • ALUT+DFF or ALM Minimum propagation delay (or Max Frequency)
I'm still a novice in this domain so I don't know if my questions are relevant or not, but I will be grateful for any advice or suggestion.

Thanks,

Amiin

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    I didn't look at all the products, but there should be some IO timing specification for all products. Stratix IV IO for example, the timing is specified in an excel spreadsheet "StratixIV_IO_timing_QII9p0.xls". It is at the bottom of the documentation "get literature (http://www.altera.com/literature/lit-stratix-iv.jsp)" page.

    Actually, the volume 4 contains more useful information FMAX generalization. This is from Stratux IV:

    I/O performance supports several system interfaces, such as the LVDS high-speed

    I/O interface, external memory interface, and the PCI/PCI-X bus interface. For

    example, Stratix IV device I/Os configured with voltage referenced I/O standards can

    achieve up to the stated system interfacing speeds as indicated in “External Memory

    Interface Specifications” on page 1–33. general-purpose i/o standards such as 3.3,

    2.5, 1.8, and 1.5 lvttl/lvcmos are capable of typical 167 mhz and 1.2 lvcmos at

    100mhz interfacing frequency with 10pf load.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Thank you Kito,

    This spreadsheet will be very useful for me :)

    I will see if the same spreadsheet exists for Statix 3
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    hi,

    I still have some question, someone could enlighten me please?

    It is written in Stratix 3 and Stratix 4 Handbook that:

    --- Quote Start ---

    general-purpose i/o standards such as 3.3,

    2.5, 1.8, and 1.5 lvttl/lvcmos are capable of typical 167 mhz and 1.2 lvcmos at

    100mhz interfacing frequency with 10pf load.

    --- Quote End ---

    but I didn't find the equivalent information for Stratix 2.

    I want this information in order to compare 3.3v lvttl pins data rates for the different FPGAs of the STRATIX family.

    Thank you,

    Amin