Forum Discussion

OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Stratix 10M DIB Module

Hi I'm using the DIB to inter connect between the 2 dies of the Stratix 10 I'm using it in BYPASS (therefore I need to define the constraints) mode and one of the IO is transferring clock from ...
  • Nurina's avatar
    Nurina
    3 years ago

    Hi,


    I cannot seem to get engineering to confirm the values, but the normal practice is by adjustment.

    You can start with the values they put for the example design and fine tune it after compilation.

    Below are the values used:

    • max C=2.65
    • min C=-2.65
    • max A + max B = 8.25
    • min A + min B = 3
    • max D + max E = 4.75
    • min D + min E = -1.64


    Regards,

    Nurina


Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to https://supporttickets.intel.com , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 4/5 survey


Regards,

Nurina