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EShum's avatar
EShum
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6 years ago

Stratix 10 Programming Issue

Hello, We are facing a problem programming S10 via JTAG. Example designs: DDR4 and PCIe AvalonST. Messages: 18950 Device has stopped receiving configuration data. 18948 Error message received fr...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Eugene,

This is weird. Can you ensure that the reference clock is supplying the clock frequency correctly to your PCIe and DDR? Also, can you try to change the TCK frequency to 6MHz? If it is not working either, try to use another piece of USB Blaster?

Thank You.

  • EShum's avatar
    EShum
    Icon for New Contributor rankNew Contributor
    6 years ago

    Hello,

    The problems were:

    1. No OSC_CLK_1 was provided.
    2. VccINT sense is being connected to 4th channel of Power manager (LTC2977). Swapping sence lines with Channel 0 by wires has almost solved the problem. All tests designs were loaded to Stratix and work fine.

    But the rest of the problem is wires. It is impossible to hand boards to customer with wires around the board. Quartus has no means to select PM Channel other than default 0.

    Is it possible to swap default PM channel by some constraints?