Stratix 10 PCI Express Avalon®-MM DMA Reference Design. Interrupt generation.

Hi,

You can try to use AVMM code For Qsys-generated Avalon-MM PCIe Hard IP,

• it has up to 16 individual interrupt signals, RxmIrq_<n>[<m>:0], <m>< 16.
• All these inputs will be mapped to one single MSI interrupt output.
• You can create your logic to detect when the wireless frame is received,
• and then use the rxm_irq_i signal to trigger the interrupt. It should work.
• https://community.intel.com/t5/FPGA-Wiki/Handling-PCIe-Interrupts/ta-p/736044

For AVMM DMA,

• the DMA descriptor controller sends an MSI interrupt to the host via TXS interface.
• You need to enable export MSI interface to implement custom MSI interrupt handle
• and send the MSI interrupt via TXS interface,
• I apologize that there is no example for this as I can see.
• As far as I understand, you need to create a MSI (Memory Write) Transaction,
• and transmit it through the TXS interface based on the information that you obtain from the MSI conduit interface,

Hope this answer your question,

Regards,

Wincent_Intel