Forum Discussion

New Contributor

3 years ago

Stratix 10 PCI Express Avalon®-MM DMA Reference Design. Interrupt generation.

Hello ! Working with a Stratix 10 board. Per AN 829: PCI Express* Avalon®-MM DMA Reference Design built the design and uploaded it to the board. I work with Windows. I successfully run DMA Read, DM...

Wincent_Altera

Regular Contributor

3 years ago

Hi,

For Avalon-MM to PCIe Interrupt Enable Register via CRA,

You may refer user guide at below link, there might got the information you needed.

https://www.intel.com/content/www/us/en/docs/programmable/683724/18-0/avalon-mm-to-pci-express-interrupt-registers.html

Let me know if any other further clarification is needed.

Regards,

Wincent_Intel

Forum Discussion

Stratix 10 PCI Express Avalon®-MM DMA Reference Design. Interrupt generation.

Recent Discussions

Question

Will serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?

1.8 V LVDS Receiver Timing Specifications for Intel MAX 10 Dual Supply Devices

Avalon-ST configuration with Agilex 3 fails

Quartus Prime Pro 25.1 fatal error during fitter: Windows "Efficiency mode" required