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TahaOZ's avatar
TahaOZ
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5 years ago

strange issue with MAX10 Development board (10m50daf484c6ges)

Hello everyone, My problem is the wrong working code in my MAX 10 development board. I have a couple of calculating VHDL codes and seperately a VHDL block which is for NIOS. If I run Calculating VH...
BoonBengT_Altera's avatar
BoonBengT_Altera
Icon for Moderator rankModerator
5 years ago

Hi @TahaOZ,

Thank you for posting in Intel community forum and hope this message find you well.
Would suggest to check on the timing violation for both the block mention.
And perhaps more details such as a screenshot on your qsys diagram would be helpful for us to understand the issues.

Warm regards.
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  • TahaOZ's avatar
    TahaOZ
    Icon for New Contributor rankNew Contributor
    5 years ago

    Thank you for your answer. I solved my issue with arranging blocks Clock frequency. i reduced special clock frequency for my blocks. It is working good now.