Startup problems web edition

The key motivator is to mitigate the risk of end of life of off the shelf components when in theory our design could be ported to different chips and be adjusted as standards evolve . We would be looking to mixed signal specifically in the rfid space where there is a need to support legacy and newer technologies with ever increasing security needs between the token and back end . I realize the broad question but was throwing out a generality to get a feel . Eg 30.000 gate design 8 months , unit price 25 us. Often we have jumped in and find that 40 % of engineering time is on keeping abreast of the tools and devices as the rate of change results in permanent loss of traction due to new design bedding down and just when stable all the factors of design freeze have moved and we begin again . I get the feeling that the fpga route is for companies that don't have the resources or market volumes for ASIC , so perhaps key decision is if volumes were high enough could we justify an ASIC and if yes the do first iteration on fpga.