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Altera_Forum
Honored Contributor
17 years agoSRAM interface timing discrepancy from Quartus-II 7.0 and 9.0
I have a design which contains an SRAM interface with the default PLL phase shift, -4.8ns for this SRAM. It was compiled by Quartus-II 7.0 and it works perfectly on my target board with an EP2C20F484...
Altera_Forum
Honored Contributor
17 years agosorry i have no information about that
so just check that and you know you haven't missed to check the settings. i had verfied that all projects don't miss the quartus settings i had to setup to gain the needed setup that the design runs, after updateding to Q8.1