Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

SRAM DS2064 into a CPLD

Is it a good idea to implement a SRAM DS2064 (8 bit x 8k) into a CPLD? After a lot of internet research, I was unable to find a VDHL code for it. I just attached the DS2064 for reference. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

If "CPLD" is used as a generic term including FPGAs like MAX10, you can implement a similar RAM in it. Consider that due to the synchronous architecture of FPGA block RAM you can't exactly model the behavior of an asynchronous SRAM. Depends on the application if this matters.