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Altera_Forum
Honored Contributor
Honored ContributorSRAM DS2064 into a CPLD
Is it a good idea to implement a SRAM DS2064 (8 bit x 8k) into a CPLD? After a lot of internet research, I was unable to find a VDHL code for it. I just attached the DS2064 for reference. ...
Altera_ForumHonored Contributor
Honored ContributorWhy would you want to do that?
FPGAs (most all) have internal block RAMs that could implement that storage in about 4-8 BRAMs. CPLDs usually have no internal block RAM, so you'd have to implement as logic.
