Forum Discussion

ThomasKendall82's avatar
ThomasKendall82
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Specify init file to inferred BRAM

Hello I've been trying to write an inferred memory with init file, but i can't manage to cause Quartus to initilize it. First, I tried to use TEXTIO to configure initial value. I've read that Qua...
  • ThomasKendall82's avatar
    ThomasKendall82
    5 years ago

    Hello,

    I'm sorry for the late response - I've been busy for the last few days.

    I tried to create a simplified example of the problem (as some of you requested) -I re-wrote it based on quartus code templates and the mif file was used correctly.

    After further inspection - I've noticed that my TextIO based initialization function, which should have been for simulation purpose only, did reset the memory to zero even when the TextIO part was not working.

    I overlooked that part untill now because it was supposed to be for simulation only and I was sure it didn't had any effect.

    I think that attribute didn't work because the function already declaired an initial value. (quartus did create a mif file for the zeros the function set to the memory)

    After I've changed that part in the function the attribute worked and all was well.

    Thank you all for your help and advice.

  • ThomasKendall82's avatar
    ThomasKendall82
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hello,

    As of your proposal- I tried to upgrade the Quartus version and see if the problem presists.

    I've checked the same code on Quartus 18.1 (Had it pre-installed) and it seemed the same.

    Generally - I'm looking for a solution that will be supported on older versions such as 14.1, so I cannot accept a Quartus upgrade as a valid solution - but if checking it on 20.1 might help to analyze the problem I will gladly try it.

    Many Thanks.

    • ak6dn's avatar
      ak6dn
      Icon for Regular Contributor rankRegular Contributor
      5 years ago

      I don't see why you should not be able to do this. I can do it in Verilog using Quartus 11.0sp1 (and later).

      In the verilog source file:

      reg [0:11] memory [0:MEMSIZE-1] /* synthesis ramstyle = "no_rw_check" */;

      initial $readmemb("meminit.txt", memory, 0, MEMSIZE-1);

      And in the plain text file meminit.txt just 8192 lines with a 12b binary data on each line:

      000000000000
      101100000011
      101100000011
      010110000011
      ...
      000000000000

      This initializes the 8192x12 block ram with the supplied data.

      I am not familiar enough with VHDL to know the exact syntax to use but I would be very surprised if it is not supported in VHDL as well.

      PS:

      Well I guess I gave Altera/Intel too much credit for their VHDL support. Per this old post:

      https://community.intel.com/t5/Programmable-Devices/What-is-VHDL-equivalent-for-Verilog-readmemb-to-initilze-RAM-ROM/td-p/263696

      VHDL memory init is not easy to do in the generic case. Glad I code only in verilog. Never much saw the point to using VHDL.

      • ThomasKendall82's avatar
        ThomasKendall82
        Icon for New Contributor rankNew Contributor
        5 years ago

        I don't think VHDL supports something like at - VHDL 93 doesn't even support 2 dimensional arrays with variying lengths to both dimensions!

        I might try out verilog as well, Thank you for your response!