Honored ContributorHi,
Can I use the SOPC Builder tool without NIOS processor? I only need the communications protocols (SPI, I2C, UART, Ethernet...) interface with my VHDL codes... (and I don't have IP cores...). If I can, how could my upper VHDL architecture code interface with the SOPC COMPONENT? Is there any documentations for that? Thanks, Idan
Honored ContributorI think you can if you have a Avalon Master in your design and all your IP's (I2c, SPI etc..) have avalon slave interfaces.
If you dont have IP's (I2c, SPI etc) with avalon bus interface, you dont need SOPC builder. Experts may clarify further on this ine detail if required.Honored ContributorIt is definitely possible to use SOPC builder without a NIOS processor. However, SOPC builder will force you to connect all Avalon slaves to a master. For example, the SPI, I2C, etc components have a slave port which must be connected to something.
It is possible to create a custom component which is an Avalon master which simply exports all the Avalon signals. Through these signals, you can then control your SOPC system directly from your VHDL code. In many cases just using a NIOS processor can be easier. In the past licensing costs could be an issue, but in later versions of Quartus (starting with version 9?), the NIOS II/e core is free, even in the web edition.Honored ContributorI would like to ask iozana,
Why are you insisting on SOPC builder? what advantages you see if you havent planned on CPU (NIOS or avalon equivalent) or other avalon master? If you are using IP's from Altera library then as per Kevin's suggestion, use NIOS CPU and It will be very easy to integrate them all. Last time I used NIOS was with my custom Avalon master along with a bunch of Avalon peripherals. It worked fine for me. An avalon master without Burst or with minimalist function would be very easy to implement.Honored ContributorHope someone can help me with a similar query:
I have written a custom master interface which takes signals from an external processor and ports them to avalon. I then pass data between different FPGA modules. In one instance, I am trying to pass a 64 bit data word (coded as an avalon writedata signal) from the master to a slave module using a 32 bit address. I only require 8 bytes of address space but instead, SOPC builder seems to try to allocate an address for every possible value that I could possibly assign to my 64 bit word, thereby exceeding the address space. I've tried using byteenable to write to the full 64 bits but this doesn't make any difference. The error message I get is that my slave module is outside the master's address range. Can anyone help? John --- Quote Start --- It is definitely possible to use SOPC builder without a NIOS processor. However, SOPC builder will force you to connect all Avalon slaves to a master. For example, the SPI, I2C, etc components have a slave port which must be connected to something. It is possible to create a custom component which is an Avalon master which simply exports all the Avalon signals. Through these signals, you can then control your SOPC system directly from your VHDL code. In many cases just using a NIOS processor can be easier. In the past licensing costs could be an issue, but in later versions of Quartus (starting with version 9?), the NIOS II/e core is free, even in the web edition. --- Quote End ---Honored ContributorThe master should have a 32-bit address vector, and the address will always be expressed in an 8-bit space (i.e. the low 3 bits will always be 0 if you have a 64-bit data vector). This is different than the address vector on a slave interface.
