Some glitches in the simualtion waveforms

Hi, Brad & FvM,

Thanks a lot for your time and help. I am working on my code to make it warning free with some variable such as cali_done etc.

But, one thing confuses me is that I have two components deadtime_1 and deadtime_2. If I simulate only one component with my current code, the simulation result is very good. Such weird glitches only happen when I simulate two components together. Since the two components have different input and output ports, they should not affect each other at all.

I agree that my coding style is not good and I am improving it. But, I doubt the mistake is caused by this style but some other reasons (?)

Again, I appreciate your help and advice!

ps: FvM, you said" Another possible reason for glitches is a timing violation caused by inputs to the design. If they are unrelated, they should be synchronized to the clock before entering the logic. In simulation, stimulating signals, that are clock synchronous in real operation, can cause apparent timing violations. " I can confirm that the inputs are not related. What do you mean by "In simulation, stimulating signals, that are clock synchronous in real operation, can cause apparent timing violations"?

Thanks, again!