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We're using i.MX6 dual core from Freescale. It has 3 SPI. The FPGA we're using is EP4CE30.
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Ok, thanks!
Freescale have excellent processor support. My selection criteria for a processor generally starts by seeing which manufacturers submit their code directly to U-Boot and Linux, and the Freescale developers do a great job with that. I use their PowerPC devices (the iMX devices do not have PCIe and some of the other features I need).
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Now, i generated .rbf and .rpd file and compare them. The're coming from .sof file of EP4CE30.
I didn't see the data in .rbf has reversed in .rpd. Both files are attached.
is there anything i have done wrong?
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No not at all. My recollection was just wrong. Just keep in mind that you need to ensure that the data written to the passive serial interface needs to be in the correct bit-order.
For example, the USB-Blaster reverses bytes (when sending byte-mode commands), so when using it to program QSPI flash, its necessary to reverse the commands to the flash, but not reverse the data.
I took a quick look at an iMX reference manual and did not see an SPI controller option for reversing the bits in a byte, so the ARM core would be needed to perform that reversal in real-time.
Assuming you want to minimize the work-load in the ARM CPU, you should probably perform the bit-reversal of the configuration data prior to writing to QSPI flash. That way you can simply DMA from the QSPI flash to the SPI controller connected to the Cyclone IV, without having to use the CPU to perform bit-reversal.
Cheers,
Dave
Honored Contributor
