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ArjunBK's avatar
ArjunBK
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4 years ago

Soft LVDS IP simulation for MAX10

Soft LVDS IP core - simulation Hello, I am working with Intel Max10 - 10M50DAF484C6GES for one of my applications, which has the requirement to transfer and rec...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,

Can you try inverting the rx_inclock signal to align it differently with the rx_in data?


Regards


ArjunBK's avatar
ArjunBK
Icon for New Contributor rankNew Contributor
4 years ago

Hi,

I tired inverting the rx_in clock, still the rx_out signal is stuck at '0'. Any further suggestions?

If you have any reference design, can you please share the link.

Regards,