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ArjunBK's avatar
ArjunBK
Icon for New Contributor rankNew Contributor
4 years ago

Soft LVDS IP simulation for MAX10

Soft LVDS IP core - simulation Hello, I am working with Intel Max10 - 10M50DAF484C6GES for one of my applications, which has the requirement to transfer and rec...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,

I am able to get the rx_out signal with your testbench and the settings that you mentioned.

Can you please try adding altera libraries during elaboration? You may use following command:

vsim -t ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L fiftyfivenm work.serdes_rx_tx_tb


Regards


ArjunBK's avatar
ArjunBK
Icon for New Contributor rankNew Contributor
4 years ago

Hi,

I tried adding the command that you given in model sim "waveform_command.jpg", no changes in the output wave from. Still RX_out is stuck at "0". I have attached the waveform for your reference "waveform_command.jpg".