Forum Discussion
Altera_Forum
Honored Contributor
11 years agoRight. For now, I would make use of the DS-5 IDE and extensions to the HWLibs/SoCal examples that are shipped as part of SoCEDS. It's a more direct method of accessing your hardware and (I think) it's the best "next step" for you and your team.
There are several bridges that go between the HPS and FPGA side of the SoC. When you're creating your Qsys design, you'll connect the bridges to your Avalon slaves. Take a look at this link to understand more about how the chip is architected and how to make use of it (http://www.alse-fr.com/archive/soc_sw_lab_13.0.pdf), particularly Module 4. The rest of the stuff you're interested in (including simple "/dev/mem" linux code) is all there as well. Google is definitely my friend... :-) Cheers! slacker