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Altera_Forum
Honored Contributor
15 years agosmoothing PLL output
Hi all I'm using a PLL on a cyclone III device to generate an 12.228 MHz clock from a 19.2 MHz input. the output clock is a square wave which causes harmonics that interferes with an RF appli...
Altera_Forum
Honored Contributor
15 years agoDid you try setting minimum slew rate for the output?
Maybe this will reduce some high frequency harmonics. You can also add a single capacitor to the output to obtain a more triangular wavwform.