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Altera_Forum's avatar
Altera_Forum
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11 years ago

Single address Avalon MM slave

<Accidentally posted this on the Nios General forum. My fault.> Quite often I create a peripheral that just uses a single word of data. The Avalon spec. states that the width of the address bu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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I do require that the register is always accessed as a 32-bit DWORD (alt_u32). Doesn't that guarantee correctness ?

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Depends if you can really guarantee it.

If, for instance, you connect the slave to the PCIe to Avalon bridge, you'll see two 32bit cycles generated for a single 32bit host transfer (because there is a 64 to 32 bit bus adapter and all PCIe cycles are actually 64bit).

So it really isn't worth ignoring the byte enable.