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Honored Contributor
Honored ContributorSimultaneous Read and Write to DDR3 SDRAM
simultaneous read and write on ddr3 sdram using soft sdram controller with uiphy ip via qsys interconnect. An AXI-MM master is connected to Qsys Interconnect to perform read and write operation...
Altera_ForumHonored Contributor
Honored ContributorFIFO settings as in which IP, My master does not support it. I did not find any buffer on the slave controller either, Would you please specify where ?
Thank you
