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Honored Contributor
Honored ContributorSimultaneous Read and Write to DDR3 SDRAM
simultaneous read and write on ddr3 sdram using soft sdram controller with uiphy ip via qsys interconnect. An AXI-MM master is connected to Qsys Interconnect to perform read and write operation...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Ahm ... having worked with a DDR3 SDRAM protocol before, the underlying protocol doesn't allow simultaneous reads and writes. As a result, any attempts you make will need to be buffered in order to give the appearance of being simultaneous. Perhaps you should check your FIFO/buffering settings therefore. Dan --- Quote End --- FIFO setting as in which IP ?, My master has no Provision for it, I did not see any on the Slave controller either. Please specify. Thank you
