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Altera_Forum
Honored Contributor
Honored Contributorsimple verilog question...
hi there! im trying to determine the root cause of an error i keep getting. Basically I'm trying to convert a 2's complement value, lets say binary X to decimal Y (i do this by multiplying...
Altera_ForumHonored Contributor
Honored Contributorthanks for the response Kaz!
Let me break it down a bit more however. The two expressions are actually the same (logically). But the outcome is different. In other words, assign X_n = ~X; always@(posedge CLK) begin Y = X_n * 625; end DOES NOT equal the below equation always@(posedge CLK) begin Y = ~X * 625; end
