Well, here's the present target I've been given;
1. No Embedded Systems Programmer available, I'm on my own and my C coding abilities are covered with a decade of dust.
2. An EP2S90 device BUT;
A: All MRAM is already dedicated to our own IP (not my design)
B: NO external memory shall be put on the board!
This leaves me with most of the M4K and M512 memory but not all of it.
3. No UART into the final design, it must stand alone as an I/O port. I can use a UART in development but not on the board itself.
4. When commands to the board are sent they shall be readily made available to our IP,
if a request for status is received it shall send back such over the ethernet interface.
5. It shall be 1Gbps capable.
You use the iNiche TCP/IP without an OS? But everything in the Altera stuff ONLY uses the iNiche with the us-osII.
I'm new to ethernet in an FPGA and I'm not an Embedded Systems Programmer. I see components like Lantronix Xport, which surely doesn't have an embedded processor, as well as read of ethernet designs using a simple micro-controller and didn't figure this would be as difficult as I now see it is.
I began reading the Altera Embedded Design Handbook and quickly discovered that what I thought was a manual to help target me toward the total and reduced hardware system I was after was actually a software developers handbook. Particularly where it pointed me toward use of command line entry for compilation, writing my own 'make files' and TCL script files I was quickly shoved out of my realm.
I tried to follow the simple_socket_server design source code and quickly got lost on the trail of all other sources called upon by it.
I was looking to try and reduce the design from the NIOS II standard size the the small size since we only want an embedded routine running all the time and only interfacing to the TSE and some FIFO or registers to out IP.
I know this is long but so is the issue.