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Altera_Forum's avatar
Altera_Forum
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17 years ago

signed/unsigned multipliers

I can't seem to find a way to instantiate a multiplier that will dynamically select between signed and unsigned multiplication. This is on a Cyclone II, but applies to other parts as well.

Reading the Cyclone II documentation it is clear that signa, signb inputs does what I want, but none of the multipliers created with the Wizzard exports that as an input signal. Trying to infer it with the code below doesn't work (bug in Quartus II?); it complains that no logic depends on input_sign. However looking at the RTL with Tools/Netlist Viewers/RTL Viewer clearly shows it being used, however the technology map viewer shows input_sign as disconnected and signa and signb hardwired to ground.

This looks like a bug to me, but I could be doing something wrong.


module mult(input clock,
input        input_sign,
input  input_a,
input  input_b,
output reg  output_c);
reg  a, b;
reg sign;
always @(posedge clock) begin
  sign <= input_sign;
  a <= input_a;
  b <= input_b;
  
  if (sign)
        output_c <= $signed(a) * $signed(b);
  else
        output_c <= $unsigned(a) * $unsigned(b);
  end
 endmodule
 

42 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Signed/unsigned is a parameter rather than an input port to lpm_mult. So it can't be changed during run time. I didn't try, but I guess, that in case of a hardware multiplier, two multiplier instances and a multiplexer are inferred from your code for this reason. A software (logic cell) multiplier should be able to incorporate the signed/unsigned switch during fit.

    As said, the input size should 2*9 bit. I guess, assigning the input to a 18 bit value forces the multiply operands to be positive, thus signed multiply is eliminated. Also, cause the full multiply result is 36 bit, you don't get it correctly in the signed case.
  • Altera_Forum's avatar
    Altera_Forum
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    I am not sure if your input bus resize is doing what you want.

    I suggest you instantiate two mult(signed,unsigned) then connect inputs to both. switch the output per input_sign.