Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

SignalTapII need to load .sof conflicts with earlier loaded .jic from EPCS.

Hello! Please advise how to use SignalTapII in the following situation. SignalTapII is to be used to test dataflow from PCIe card in the presence of a testing program. PCIe card's PCIe control...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Try the following;

1. Power-up your test machine containing the PCIe card, and stop at the BIOS screen.

2. Download your .sof and connect SignalTap II.

3. Escape from the BIOS and allow your PC to continue booting.

This ensures that the BIOS enumerates the PCIe core, and that you do not change the FPGA configuration after the PC boots.

Cheers,

Dave