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Altera_Forum's avatar
Altera_Forum
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10 years ago

Signaltap fixes my problem??

I have a design (without signaltap) that shows a failure. Every attempt to connect signaltap to any signal (even 1 or 2 and the sampling clock) , the problem goes away. I have also seen where the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

It's a different place-and-route that is fixing it, not SignalTap. You could run a bunch of seeds with SignalTap and hope it shows up again, but I wouldn't recommend it. Set the Top partition to Post-Fit(if you have any user created partitions, set them to post-fit too). This will lock everything down, including the failure. In SignalTap, you will only be able to tap post-fit nodes, and I would recommend just looking at registers as those are the most reliable, and you should be able to pin it down.

Since you have fits that do work, you could also tap those same nodes and recompile everything, and if that image works, you can compare SignalTap between the working and non-working design.